Agilent Technologies Video Gaming Accessories Agilent Technologies Video Gaming Accessories User Manual

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Chapter 3 Calibration Procedures
Constant Voltage (CV) Verifications
50
7
Program the output voltage to full rated value (30.0V) by sending the command.
VOLT 30.0
8
Record the output voltage reading on the digital voltmeter (DVM). The readings
should be within the limits of (30V
± 2
5mV).
9
Readback the output voltage over the remote interface by sending the
command:
MEAS:VOLT?
10
Record the value displayed on the controller. This value should be within the
limits of (DVM
± 2
0mV).
CV Load Regulation
This test measures the change in the output voltage resulting from a change in
the output current from full to no load.
1
Turn off the power supply and connect a digital voltmeter between the (+) and
(-) terminals of the output to be tested as shown in Figure 3-1.
2
Turn on the power supply. Select the 30V/4A range, enable the output, and set
the display to the limit mode. When the display is in the limit mode, program
the output current to the full rated value (4.0A) and the voltage to the full rated
value (30.0V)
3
Operate the electronic load in constant current mode and set its current to
4.0A. Check that the front panel
CV annunciator remains lit. If not lit, adjust
the load so that the output current drops slightly until the
CV annunciator
lights. Record the output voltage reading on the digital voltmeter.
4
Operate the electronic load in open mode (input off). Record the output voltage
reading on the digital voltmeter again. The difference between the digital
voltmeter readings in steps (3) and (4) is the CV load regulation. The difference
of the readings should be within the limit of 5mV.
CV Line Regulation
This test measures the change in output voltage that results from a change in
ac line voltage from the minimum value (10% below the nominal input voltage)
to maximum value (10% above the nominal input voltage).
1
Turn off the power supply and connect a digital voltmeter between the (+) and
(-) terminals of the output to be tested as shown in Figure 3-1.

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